Publications

Yan Luo, Jia Yu, Jun Yang and Laxmi Bhuyan, Li Zhao, Conserving Network Processor Power Consumption by Exploiting Traffic Variability, ACM Transactions on Computer Architecture and Code Optimization, to appear.

Yan Luo, Jun Yang, Laxmi Bhuyan, Li Zhao, NePSim: A Network Processor Simulator with Power Evaluation Framework, IEEE Micro Special Issue on Network Processors for Future High-End Systems and Applications, Sept/Oct 2004.

Yan Luo, Laxmi Bhuyan, Xi Chen, Shared Memory Multiprocessor Architectures for Software IP Routers, IEEE Transactions on Parallel and Distributed Systems, Vol 14, No. 12, Dec 2003

Xi Chen, Yan Luo, Harry Hsieh, Laxmi Bhuyan and Felice Balarin, Assertion-Based Verification and Analysis of Network Processor Architectures, to appear, International Journal of Design Automation for Embedded Systems, Kluwer Academic Publishers.

Jia Yu, Jun Yang, Shaojie Chen, Yan Luo, Laxmi Bhuyan, Enhancing Network Processor Simulation Speed with Statistical Input Sampling, Lecture Notes in Computer Science, Volume 3793, Oct 2005, Pages 68 - 83, Springer-Verlag Publishers

Piti Piyachon, Yan Luo, Efficient Memory Utilization on Network Processors for Deep Packet Inspection, ACM Symposium on Architectures for Network and Communications System, San Jose, CA, Dec 3-5, 2006

Jingnan Yao, Yan Luo, Laxmi Bhuyan, Ravi Iyer, Optimal Network Processor Topologies for Efficient Packet Processing, IEEE Globecom 2005, St Louis, MO, Nov 28-Dec 2, 2005

Li Zhao, Yan Luo, Laxmi Bhuyan, Ravi Iyer, SpliceNP: A TCP Splicer using A Network Processor, ACM Symposium on Architectures for Network and Communications System, Princeton, NJ, Oct 26-28, 2005

Li Zhao, Yan Luo, Laxmi Bhuyan, Ravi Iyer, Implementation and Design of A Content-aware Switch Using A Network Processor, IEEE Hot-Interconnect, Stanford, CA, August 2005

Yan Luo, Jia Yu, Jun Yang, Laxmi Bhuyan, Low Power Network Processor Design Using Clock Gating, IEEE/ACM Design Automation Conference (DAC), Ahaheim, California, June 13-17, 2005

Xi Chen, Yan Luo, Harry Hsieh, Laxmi Bhuyan, Felice Balarin, Utilizing Formal Assertions for System Design of Network Processors, Design Forum, Design Automation and Test in Europe (DATE), 2004.

Yan Luo, Li Zhao, Laxmi Bhuyan, Walid Najjar, Evaluating the Impact of Architectural Features on Communication Benchmarks, Communications in Computing, Nevada, USA, June 24-27, 2002

David Watson, Yan Luo, and Brett Fleisch, Experiences with Oasis+: A Fault Tolerant Storage System, Proceedings of the IEEE International Conference on Cluster Computing, Oct 8-11 2001, Newport Beach, CA.

David Watson, Yan Luo, and Brett Fleisch, The Oasis+ Dependable Distributed Storage System, Proceedings of the 2000 Pacific Rim International Symposium on Dependable Computing, December 18-19, 2000, Los Angeles, CA.

Efficient Memory Utilization on Network Processors for Deep Packet Inspection, Invited Talk, Jan 16, 2007

Network Processors: Architecture and Applications, Center for Atmospheric Research, UMass Lowell, Dec 2, 2005

SplicNP: A TCP Splicer using an Network Processor, ACM ANCS, Princeton, NJ, Oct 28, 2005

Protocol Offloading using an IXP2400 Network Processor, Intel IXA 2005 Summit, Hudson, MA, Sept 27, 2005

Network Processors: Architecture, Performance Evaluation and Applications, Center for Network Information Security, UMass Lowell, Sept 16 and 23, 2005

Low Power Network Processor Design using Clock Gating. Design Automation Conference, Anaheim, CA, June 16, 2005